.subckt pl_4to1_mult gnd vcc
M9 10 8 gnd gnd NMOS  L=0.06U W=0.6U 
M1 gnd 15 2 gnd NMOS  L=0.06U W=0.3U 
M4 5 2 4 gnd NMOS  L=0.06U W=0.25U 
M3 4 15 3 gnd NMOS  L=0.06U W=0.25U 
M10 11 2 12 gnd NMOS  L=0.06U W=0.25U 
M11 12 15 13 gnd NMOS  L=0.06U W=0.25U 
M2 6 14 gnd gnd NMOS  L=0.06U W=0.4U 
M8 gnd 4 9 gnd NMOS  L=0.06U W=0.2U 
M7 9 14 8 gnd NMOS  L=0.06U W=0.25U 
M6 8 6 7 gnd NMOS  L=0.06U W=0.25U 
M5 7 12 gnd gnd NMOS  L=0.06U W=0.2U 
M13 10 8 vcc vcc PMOS  L=0.06U W=1U 
M12 vcc 15 2 vcc PMOS  L=0.06U W=0.8U 
M21 3 2 4 vcc PMOS  L=0.06U W=1U 
M22 4 15 5 vcc PMOS  L=0.06U W=1U 
M20 13 2 12 vcc PMOS  L=0.06U W=1U 
M19 12 15 11 vcc PMOS  L=0.06U W=1U 
M14 6 14 vcc vcc PMOS  L=0.06U W=0.8U 
M18 vcc 4 9 vcc PMOS  L=0.06U W=1U 
M17 9 6 8 vcc PMOS  L=0.06U W=1U 
M16 8 14 7 vcc PMOS  L=0.06U W=1U 
M15 7 12 vcc vcc PMOS  L=0.06U W=1U 
.ends 4to1_mult PMOS  L=0.06U W=1U 

.subckt pl_xnr30 A B C Q gnd vcc
M23 Q n2 n4 vcc  PMOS  L=0.06U W=0.25U 
M24 n4 n1 vcc vcc  PMOS  L=0.06U W=0.25U 
M22 vcc n1 n5 vcc  PMOS  L=0.06U W=0.2U
M21 n5 C n2 vcc  PMOS  L=0.06U W=0.2U 
M25 n4 C vcc vcc  PMOS  L=0.06U W=0.25U 
M20 vcc B n6 vcc  PMOS  L=0.06U W=0.4U 
M19 n6 A vcc vcc  PMOS  L=0.06U W=0.4U 
M18 vcc n6 n1 vcc  PMOS  L=0.06U W=0.7U 
M26 n1 B n7 vcc  PMOS  L=0.06U W=0.25U 
M27 n7 A vcc vcc  PMOS  L=0.06U W=0.25U 
M35 n1 n6 n3 gnd  NMOS  L=0.06U W=0.2U 
M36 n3 B gnd gnd  NMOS  L=0.06U W=0.2U 
M28 gnd n2 Q gnd  NMOS  L=0.06U W=0.5U 
M33 Q n1 n16 gnd  NMOS  L=0.06U W=0.2U 
M34 n16 C gnd gnd  NMOS  L=0.06U W=0.2U 
M32 gnd n1 n2 gnd  NMOS  L=0.06U W=0.4U 
M31 n2 C gnd gnd  NMOS  L=0.06U W=0.4U 
M29 gnd B n15 gnd  NMOS  L=0.06U W=0.5U
M30 n15 A n6 gnd  NMOS  L=0.06U W=0.5U 
M37 n3 A gnd gnd  NMOS  L=0.06U W=0.2U 
.ends

.subckt pl_add32 a b ci s vcc gnd
MP1 2 b vcc vcc  PMOS  L=0.06U W=0.5U 
MP2 vcc ci 1 vcc  PMOS  L=0.06U W=0.5U 
MP3 1 b vcc vcc  PMOS  L=0.06U W=0.5U 
MP4 vcc a 2 vcc  PMOS  L=0.06U W=0.5U 
MP5 2 ci 10 vcc  PMOS  L=0.06U W=0.5U 
MP6 10 b 8 vcc  PMOS  L=0.06U W=0.5U 
MP7 8 a vcc vcc  PMOS  L=0.06U W=0.5U 
MP8 vcc a 6 vcc  PMOS  L=0.06U W=0.5U 
MP9 6 b 7 vcc  PMOS  L=0.06U W=0.5U 
MP10 7 ci 9 vcc  PMOS  L=0.06U W=0.5U 
MP11 9 10 1 vcc  PMOS  L=0.06U W=0.5U 
MP12 1 a vcc vcc  PMOS  L=0.06U W=0.5U 
MP13 vcc 9 s vcc  PMOS  L=0.06U W=0.5U 
MP14  co 10 vcc vcc  PMOS  L=0.06U W=0.5U 
MN1 20 b gnd gnd NMOS  L=0.06U W=0.3U 
MN2 gnd ci 11 gnd NMOS  L=0.06U W=0.3U 
MN3 11 b gnd gnd NMOS  L=0.06U W=0.3U 
MN4 gnd a 20 gnd NMOS  L=0.06U W=0.3U 
MN5 20 ci 10 gnd NMOS  L=0.06U W=0.3U 
MN6 10 b s gnd NMOS  L=0.06U W=0.3U 
MN7 s a gnd gnd NMOS  L=0.06U W=0.3U 
MN8 gnd a 3 gnd NMOS  L=0.06U W=0.3U 
MN9 3 b 4 gnd NMOS  L=0.06U W=0.3U 
MN10 4 ci 9 gnd NMOS  L=0.06U W=0.3U 
MN11 9 10 11 gnd NMOS  L=0.06U W=0.3U 
MN12 11 a gnd gnd NMOS  L=0.06U W=0.3U 
MN13 gnd 9 s gnd NMOS  L=0.06U W=0.3U 
MN14 co 10 gnd gnd NMOS  L=0.06U W=0.3U 
.ends

.subckt pl_R_MBLP d clk q qm vcc gnd
MN1 !c clk gnd gnd NMOS L=0.06U W=0.4U
MN11 gnd 5 q gnd NMOS L=0.06U W=0.4U
MN6 qm 2 gnd gnd NMOS L=0.06U W=0.4U
MN7 gnd qm 6 gnd NMOS L=0.06U W=0.4U
MN9 6 clk 5 gnd NMOS L=0.06U W=0.4U
MN10 5 !c 4 gnd NMOS L=0.06U W=0.4U
MN8 4 q gnd gnd NMOS L=0.06U W=0.4U
MN3 gnd qm 1 gnd NMOS L=0.06U W=0.4U
MN5 1 clk 2 gnd NMOS L=0.06U W=0.4U
MN4 2 !c 3 gnd NMOS L=0.06U W=0.4U
MN2 3 d gnd gnd NMOS L=0.06U W=0.4U
MP1 !c clk vcc vcc PMOS L=0.06U W=0.6U
MP11 vcc 5 q vcc PMOS L=0.06U W=0.6U
MP6 qm 2 vcc vcc PMOS L=0.06U W=0.6U
MP8 vcc q 4 vcc PMOS L=0.06U W=0.6U
MP10 4 clk 5 vcc PMOS L=0.06U W=0.6U
MP9 5 !c 6 vcc PMOS L=0.06U W=0.6U
MP7 6 qm vcc vcc PMOS L=0.06U W=0.6U
MP2 vcc d 3 vcc PMOS L=0.06U W=0.6U
MP4 3 clk 2 vcc PMOS L=0.06U W=0.6U
MP5 2 !c 1 vcc PMOS L=0.06U W=0.6U
MP3 1 qm vcc vcc PMOS L=0.06U W=0.6U
.ends R_MBLP

.subckt 4to1_mult A B C Q gnd vcc
M1 gnd 15 2 gnd NMOS  L=0.06U W=0.3U 
M2 gnd 14 6 gnd NMOS  L=0.06U W=0.4U 
M3 3 15 4 gnd NMOS  L=0.06U W=0.25U 
M4 4 2 5 gnd NMOS  L=0.06U W=0.25U 
M5 gnd 12 7 gnd NMOS  L=0.06U W=0.2U 
M6 7 6 8 gnd NMOS  L=0.06U W=0.25U 
M7 8 14 9 gnd NMOS  L=0.06U W=0.25U 
M8 gnd 4 9 gnd NMOS  L=0.06U W=0.2U 
M9 gnd 8 10 gnd NMOS  L=0.06U W=0.6U 
M10 11 2 12 gnd NMOS  L=0.06U W=0.25U 
M11 12 15 13 gnd NMOS  L=0.06U W=0.25U 
M12 2 15 vcc vcc PMOS  L=0.06U W=0.8U 
M13 10 8 vcc vcc PMOS  L=0.06U W=1U 
M14 6 14 vcc vcc PMOS  L=0.06U W=0.8U 
M15 7 12 vcc vcc PMOS  L=0.06U W=1U 
M16 7 14 8 vcc PMOS  L=0.06U W=1U 
M17 8 6 9 vcc PMOS  L=0.06U W=1U 
M18 9 4 vcc vcc PMOS  L=0.06U W=1U 
M19 11 15 12 vcc PMOS  L=0.06U W=1U 
M20 12 2 13 vcc PMOS  L=0.06U W=1U 
M21 3 2 4 vcc PMOS  L=0.06U W=1U 
M22 4 15 5 vcc PMOS  L=0.06U W=1U 
.ends 4to1_mult PMOS  L=0.06U W=1U 

.subckt R_MBLP d clk q qm vcc gnd
MN1 gnd clk !c gnd NMOS L=0.06U W=0.4U
MN5 1 clk 2 gnd NMOS L=0.06U W=0.4U
MN9 6 clk 5 gnd NMOS L=0.06U W=0.4U
MP1 !c clk vcc vcc PMOS L=0.06U W=0.6U
MP4 3 clk 2 vcc PMOS L=0.06U W=0.6U
MP10 4 clk 5 vcc PMOS L=0.06U W=0.6U
MN2 gnd d 3 gnd NMOS L=0.06U W=0.4U
MP2 3 d vcc vcc PMOS L=0.06U W=0.6U
MN3 gnd qm 1 gnd NMOS L=0.06U W=0.4U
MN7 gnd qm 6 gnd NMOS L=0.06U W=0.4U
MP3 1 qm vcc vcc PMOS L=0.06U W=0.6U
MP7 6 qm vcc vcc PMOS L=0.06U W=0.6U
MN4 3 !c 2 gnd NMOS L=0.06U W=0.4U
MN10 4 !c 5 gnd NMOS L=0.06U W=0.4U
MP5 1 !c 2 vcc PMOS L=0.06U W=0.6U
MP9 6 !c 5 vcc PMOS L=0.06U W=0.6U
MN8 gnd q 4 gnd NMOS L=0.06U W=0.4U
MP8 4 q vcc vcc PMOS L=0.06U W=0.6U
MN11 gnd 5 q gnd NMOS L=0.06U W=0.4U
MP11 q 5 vcc vcc PMOS L=0.06U W=0.6U
MP6 qm 2 vcc vcc PMOS L=0.06U W=0.6U
MN6 gnd 2 qm gnd NMOS L=0.06U W=0.4U
.ends R_MBLP

.subckt TSPC_REG D Q !Q clk vcc gnd
MN1 gnd D x gnd NMOS L=0.06U W=0.4U
MP2 1 D vcc vcc PMOS L=0.06U W=0.6U
MN2 gnd clk 2 gnd NMOS L=0.06U W=0.4U
MN3 3 clk !q gnd NMOS L=0.06U W=0.4U
MP1 x clk 1 vcc PMOS L=0.06U W=0.6U
MP3 y clk vcc vcc PMOS L=0.06U W=0.6U
MN4 2 x y gnd NMOS L=0.06U W=0.4U
MN5 gnd y 3 gnd NMOS L=0.06U W=0.4U
MP2 !q y vcc vcc PMOS L=0.06U W=0.6U
MN6 gnd !q q gnd NMOS L=0.06U W=0.4U
MP2 q !q vcc vcc PMOS L=0.06U W=0.6U
.ends inv

.subckt inv in out vcc gnd
MN0.1 out in gnd gnd NMOS L=0.06U W=0.4U
MP2 out in vcc vcc PMOS L=0.06U W=0.8U
.ends inv

.subckt buf_3s in out vcc gnd
MN3 gnd in 1 gnd NMOS L=0.06U W=0.2U
MN1 gnd 1 2 gnd NMOS L=0.06U W=0.8U
MN1 gnd 2 out gnd NMOS L=0.06U W=3.2U
MP4 1 in vcc vcc PMOS L=0.06U W=0.3U
MP2 2 1 vcc vcc PMOS L=0.06U W=1.2U
MP2 out 2 vcc vcc PMOS L=0.06U W=4.8U
.ends buf_s

.subckt and2 a b out vcc gnd
MN1 out a b gnd NMOS L=0.06U W=0.20U
MP2 out a gnd vcc PMOS L=0.06U W=0.40U
.ends and2

.subckt nand2 a b out vcc gnd
MN1 out a b0 gnd NMOS L=0.06U W=0.4U
MN3 b0 b gnd gnd NMOS L=0.06U W=0.40U
MP2 out a vcc vcc PMOS L=0.06U W=0.3U
MP4 out b vcc vcc PMOS L=0.06U W=0.3U
.ends nand2

.subckt or2 a b out vcc gnd
MN1 out a vcc gnd NMOS L=0.06U W=0.3U
MP2 out a b vcc PMOS L=0.06U W=0.45U
.ends or2

.subckt nor2 a b out vcc gnd
MN1 out a gnd gnd NMOS L=0.06U W=0.3U
MN3 out b gnd gnd NMOS L=0.06U W=0.3U
MP2 b0 a vcc vcc PMOS L=0.06U W=0.9U
MP4 b0 b out vcc PMOS L=0.06U W=0.9U
.ends nor2

.subckt mux21 a b c out vcc gnd
MN1 s1 a b gnd NMOS L=0.06U W=0.20U
MP2 s1 a c vcc PMOS L=0.06U W=0.40U
MN3 s2 s1 gnd gnd NMOS L=0.06U W=0.40U
MP4 s2 s1 vcc vcc PMOS L=0.06U W=0.40U
MN5 out s2 gnd gnd NMOS L=0.06U W=0.40U
MP6 out s2 vcc vcc PMOS L=0.06U W=0.40U
.ends mux21

.subckt muxi21 a b c out vcc gnd
MN1 s1 a b gnd NMOS L=0.06U W=0.40U
MP2 s1 a c vcc PMOS L=0.06U W=0.40U
MN5 out s1 gnd gnd NMOS L=0.06U W=0.40U
MP6 out s1 vcc vcc PMOS L=0.06U W=0.40U
.ends muxi21

.subckt add32 A B CI CO S gnd vcc
M22 CO 10 vcc vcc  PMOS  L=0.06U W=0.32U 
M23 vcc A 8 vcc  PMOS  L=0.06U W=0.32U 
M24 8 B 10 vcc  PMOS  L=0.06U W=0.32U 
M25 10 CI 2 vcc  PMOS  L=0.06U W=0.32U 
M26 2 A vcc vcc  PMOS  L=0.06U W=0.32U 
M27 vcc B 2 vcc  PMOS  L=0.06U W=0.32U 
M28 9 10 1 vcc  PMOS  L=0.06U W=0.32U 
M29 1 A vcc vcc  PMOS  L=0.06U W=0.32U 
M30 vcc B 1 vcc  PMOS  L=0.06U W=0.32U 
M31 1 CI vcc vcc  PMOS  L=0.06U W=0.32U 
M32 9 CI 7 vcc  PMOS  L=0.06U W=0.32U 
M33 7 B 6 vcc  PMOS  L=0.06U W=0.32U 
M34 6 A vcc vcc  PMOS  L=0.06U W=0.32U 
M35 vcc 9 S vcc  PMOS  L=0.06U W=0.32U 
M36 CO 10 gnd gnd  NMOS  L=0.06U W=0.2U 
M37 gnd A 5 gnd  NMOS  L=0.06U W=0.2U 
M38 5 B 10 gnd  NMOS  L=0.06U W=0.2U 
M39 10 CI 20 gnd  NMOS  L=0.06U W=0.2U 
M40 20 A gnd gnd  NMOS  L=0.06U W=0.2U 
M41 gnd B 20 gnd  NMOS  L=0.06U W=0.2U 
M42 9 10 11 gnd  NMOS  L=0.06U W=0.2U 
M43 11 A gnd gnd  NMOS  L=0.06U W=0.2U 
M44 gnd B 11 gnd  NMOS  L=0.06U W=0.2U 
M45 11 CI gnd gnd  NMOS  L=0.06U W=0.2U 
M46 9 CI 4 gnd  NMOS  L=0.06U W=0.2U 
M47 4 B 3 gnd  NMOS  L=0.06U W=0.2U 
M48 3 A gnd gnd  NMOS  L=0.06U W=0.2U 
M49 gnd 9 S gnd  NMOS  L=0.06U W=0.2U 
.ends

.subckt mux42 i0 i1 i2 i3 e0 e1 out0 out1  
MN1 i0 e0 out0 gnd NMOS L=0.06U W=0.2U 
MP1 i0 e1 out0 vcc PMOS L=0.06U W=0.4U 
MN2 i1 e1 out0 gnd NMOS L=0.06U W=0.2U 
MP2 i1 e0 out0 vcc PMOS L=0.06U W=0.4U 
MN3 i2 e0 out1 gnd NMOS L=0.06U W=0.2U 
MP3 i2 e1 out1 vcc PMOS L=0.06U W=0.4U 
MN4 i3 e1 out1 gnd NMOS L=0.06U W=0.2U 
MP4 i3 e0 out1 vcc PMOS L=0.06U W=0.4U 
.ends

.subckt nand8 a b c d e f g h out vcc gnd
MN1 n1   a gnd gnd NMOS L=0.06U W=0.4U 
MN2 n2   b n1  gnd NMOS L=0.06U W=0.4U 
MN3 n3   c n2  gnd NMOS L=0.06U W=0.4U 
MN4 n4   d n3  gnd NMOS L=0.06U W=0.4U 
MN5 n5   e n4  gnd NMOS L=0.06U W=0.4U 
MN6 n6   f n5  gnd NMOS L=0.06U W=0.4U 
MN7 n7   g n6  gnd NMOS L=0.06U W=0.4U 
MN8 out  h n7  gnd NMOS L=0.06U W=0.4U 
MP1 vcc  a out vcc PMOS L=0.06U W=0.4U 
MP2 vcc  b out vcc PMOS L=0.06U W=0.4U 
MP3 vcc  c out vcc PMOS L=0.06U W=0.4U 
MP4 vcc  d out vcc PMOS L=0.06U W=0.4U 
MP5 vcc  e out vcc PMOS L=0.06U W=0.4U 
MP6 vcc  f out vcc PMOS L=0.06U W=0.4U 
MP7 vcc  g out vcc PMOS L=0.06U W=0.4U 
MP8 vcc  h out vcc PMOS L=0.06U W=0.4U 
.ends nand8

.subckt sccg1_3 a b c out vcc gnd
MN1 out  a n2 gnd NMOS L=0.06U W=0.2U 
MN2 n2   b gnd gnd NMOS L=0.06U W=0.2U 
MN3 out  c gnd gnd NMOS L=0.06U W=0.2U 
MP1 vcc  a  n1 vcc PMOS L=0.06U W=0.4U 
MP2 vcc  b  n1 vcc PMOS L=0.06U W=0.4U 
MP3 n1   c out vcc PMOS L=0.06U W=0.4U 
.ends sccg1_3

.subckt xnr30 A B C Q gnd vcc
M18 vcc n6 n1 vcc  PMOS  L=0.06U W=0.7U 
M35 n1 n6 n3 gnd  NMOS  L=0.06U W=0.2U 
M32 n2 n1 gnd gnd  NMOS  L=0.06U W=0.4U 
M22 n5 n1 vcc vcc  PMOS  L=0.06U W=0.2U
M24 n4 n1 vcc vcc  PMOS  L=0.06U W=0.25U 
M33 Q n1 n16 gnd  NMOS  L=0.06U W=0.2U 
M19 vcc A n6 vcc  PMOS  L=0.06U W=0.4U 
M27 n7 A vcc vcc  PMOS  L=0.06U W=0.25U 
M30 n15 A n6 gnd  NMOS  L=0.06U W=0.5U 
M37 n3 A gnd gnd  NMOS  L=0.06U W=0.2U 
M20 n6 B vcc vcc  PMOS  L=0.06U W=0.4U 
M26 n1 B n7 vcc  PMOS  L=0.06U W=0.25U 
M29 gnd B n15 gnd  NMOS  L=0.06U W=0.5U
M36 gnd B n3 gnd  NMOS  L=0.06U W=0.2U 
M23 Q n2 n4 vcc  PMOS  L=0.06U W=0.25U 
M28 gnd n2 Q gnd  NMOS  L=0.06U W=0.5U 
M25 vcc C n4 vcc  PMOS  L=0.06U W=0.25U 
M21 n2 C n5 vcc  PMOS  L=0.06U W=0.2U 
M31 gnd C n2 gnd  NMOS  L=0.06U W=0.4U 
M34 n16 C gnd gnd  NMOS  L=0.06U W=0.2U 
.ends


.subckt xor41 A B C D Q gnd vcc
M25 12 13 9 vcc  PMOS  L=0.06U W=0.25U 
M26 9 11 vcc vcc  PMOS  L=0.06U W=0.25U 
M27 Q 12 3 vcc  PMOS  L=0.06U W=0.32U 
M28 3 11 vcc vcc  PMOS  L=0.06U W=0.32U 
M29 vcc 13 3 vcc  PMOS  L=0.06U W=0.32U 
M30 13 22 vcc vcc  PMOS  L=0.06U W=0.8U 
M31 vcc 1 11 vcc  PMOS  L=0.06U W=0.8U 
M32 vcc C 10 vcc  PMOS  L=0.06U W=0.25U 
M33 10 D 13 vcc  PMOS  L=0.06U W=0.25U 
M34 11 B 7 vcc  PMOS  L=0.06U W=0.25U 
M35 7 A vcc vcc  PMOS  L=0.06U W=0.25U 
M36 vcc D 22 vcc  PMOS  L=0.06U W=0.4U 
M37 22 C vcc vcc  PMOS  L=0.06U W=0.4U 
M38 1 A vcc vcc  PMOS  L=0.06U W=0.4U 
M39 vcc B 1 vcc  PMOS  L=0.06U W=0.4U 
M40 gnd 13 12 gnd  NMOS  L=0.06U W=0.65U
M41 12 11 gnd gnd  NMOS  L=0.06U W=0.65U
M42 Q 11 5 gnd  NMOS  L=0.06U W=2U 
M43 5 13 gnd gnd  NMOS  L=0.06U W=2U 
M44 gnd C 2 gnd  NMOS  L=0.06U W=0.1U 
M45 2 D gnd gnd  NMOS  L=0.06U W=0.1U 
M46 2 22 13 gnd  NMOS  L=0.06U W=0.1U 
M47 gnd 12 Q gnd  NMOS  L=0.06U W=0.1U 
M48 11 1 23 gnd  NMOS  L=0.06U W=0.1U 
M49 gnd B 23 gnd  NMOS  L=0.06U W=0.1U 
M50 23 A gnd gnd  NMOS  L=0.06U W=0.1U 
M51 gnd C 6 gnd  NMOS  L=0.06U W=0.5U 
M52 6 D 22 gnd  NMOS  L=0.06U W=0.5U 
M53 gnd A 4 gnd  NMOS  L=0.06U W=0.5U 
M54 4 B 1 gnd  NMOS  L=0.06U W=0.5U 
.ends
